![Manish Kumar BTech, MEng, PhD](https://profiles-cardiff.imgix.net/attachments/5651?w=200&h=200&auto=format&crop=faces&fit=crop&q=90")
Dr Manish Kumar
(e/fe)
BTech, MEng, PhD
Peiriannydd Ymchwil a Datblygu Gyrwyr Gate Gweithredol (Cyswllt KTP)
- Ar gael fel goruchwyliwr ôl-raddedig
Trosolwyg
Dr. Manish Kumar (MK) is an Active Gate Driver Research and Development Engineer (KTP Associate) appointed by Cardiff University. He has been working on a collaborative project between Cardiff University and Toshiba Research Europe Ltd since October 2022. The project is funded through the Knowledge Transfer Partnership (KTP) Scheme which is funded through a UK Government grant (UK Research and Innovation, UKRI) and a contribution from the host company, Toshiba Research Europe Ltd., in order for the KTP Associate to deliver the specific project. He works offsite at Bristol Research and Innovation Lab, Toshiba Research Europe Ltd, Bristol, United Kingdom.
He was awarded a Ph.D. in Electrical Engineering from the Indian Institute of Technology Ropar, Punjab, India, in 2022. He has extensively worked on the analysis, measurement, and mitigation of common-mode, differential mode, and non-intrinsic differential mode electromagnetic interference (EMI) in his research work. He also has gained expertise in designing output EMI filters for Si and SiC (wide-bandgap, WBG semiconductor) based inverter-fed AC motor drives. He has notable IEEE Transaction, Journal, and Conference publications in the said domain.
Cyhoeddiad
2024
- Kumar, M., Feng, Z., Wang, S., Sandell, M. and Ming, W. 2024. Closed loop digital design of active gate driver based power converter. Presented at: 39th Annual IEEE Applied Power Electronics Conference and Exposition, Long Beach, CA, USA, 25-29 February 20242024 IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE pp. 1135-1140., (10.1109/APEC48139.2024.10509512)
2023
- Kumar, M. and Jayaraman, K. 2023. Analysis and measurement of non-intrinsic differential-mode noise in a SiC inverter fed drive and Its attenuation using a passive sinusoidal output EMI filter. IEEE Transactions on Energy Conversion 38(1), pp. 428-438. (10.1109/TEC.2022.3207899)
2022
- Kumar, M. and Jayaraman, K. 2022. Design of a modified single-stage and multistage emi filter to attenuate common-mode and differential-mode noises in sic inverter. {IEEE} Journal of Emerging and Selected Topics in Power Electronics 10(4), pp. 4290-4302. (10.1109/JESTPE.2021.3133374)
- Nistane, T. J., Kumar, M. and Jayaraman, K. 2022. Comparative evaluation of SiC based two-level inverter with passive EMI filter against dual two-level inverter under PWM schemes. Presented at: IEEE International Conference on Power Electronics, Smart Grid, and Renewable Energy (PESGRE) 2022, Trivandrum, India, 02-05 January 20222022 IEEE International Conference on Power Electronics, Smart Grid, and Renewable Energy (PESGRE). IEEE, (10.1109/pesgre52268.2022.9715750)
2020
- Jayaraman, K. and Kumar, M. 2020. Design of passive common-mode attenuation methods for inverter-fed induction motor drive with reduced common-mode voltage PWM technique. IEEE Transactions on Power Electronics 35(3), pp. 2861-2870. (10.1109/TPEL.2019.2930825)
- Kumar, M. and Jayaraman, K. 2020. Design of Active Common Mode Noise Voltage Canceler for SiC Inverter Fed Induction Motor Drive with Reduced Common Mode Voltage PWM. Presented at: 2020 IEEE 29th International Symposium on Industrial Electronics (ISIE), Delft, Netherlands, 17-19 June 2020. IEEE, (10.1109/isie45063.2020.9152492)
- Jayaraman, K. and Kumar, M. 2020. Design of Passive Common-Mode Attenuation Methods for Inverter-Fed Induction Motor Drive With Reduced Common-Mode Voltage PWM Technique. {IEEE} Transactions on Power Electronics 35(3), pp. 2861-2870. (10.1109/TPEL.2019.2930825)
- Kumar, M. and Jayaraman, K. 2020. Common mode impedance shaping choke to attenuate the conducted EMI in three phase drive. Presented at: 2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES), Jaipur, India, 16-19 December 20202020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES). IEEE, (10.1109/PEDES49360.2020.9379346)
Articles
- Kumar, M. and Jayaraman, K. 2023. Analysis and measurement of non-intrinsic differential-mode noise in a SiC inverter fed drive and Its attenuation using a passive sinusoidal output EMI filter. IEEE Transactions on Energy Conversion 38(1), pp. 428-438. (10.1109/TEC.2022.3207899)
- Kumar, M. and Jayaraman, K. 2022. Design of a modified single-stage and multistage emi filter to attenuate common-mode and differential-mode noises in sic inverter. {IEEE} Journal of Emerging and Selected Topics in Power Electronics 10(4), pp. 4290-4302. (10.1109/JESTPE.2021.3133374)
- Jayaraman, K. and Kumar, M. 2020. Design of passive common-mode attenuation methods for inverter-fed induction motor drive with reduced common-mode voltage PWM technique. IEEE Transactions on Power Electronics 35(3), pp. 2861-2870. (10.1109/TPEL.2019.2930825)
- Jayaraman, K. and Kumar, M. 2020. Design of Passive Common-Mode Attenuation Methods for Inverter-Fed Induction Motor Drive With Reduced Common-Mode Voltage PWM Technique. {IEEE} Transactions on Power Electronics 35(3), pp. 2861-2870. (10.1109/TPEL.2019.2930825)
Conferences
- Kumar, M., Feng, Z., Wang, S., Sandell, M. and Ming, W. 2024. Closed loop digital design of active gate driver based power converter. Presented at: 39th Annual IEEE Applied Power Electronics Conference and Exposition, Long Beach, CA, USA, 25-29 February 20242024 IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE pp. 1135-1140., (10.1109/APEC48139.2024.10509512)
- Nistane, T. J., Kumar, M. and Jayaraman, K. 2022. Comparative evaluation of SiC based two-level inverter with passive EMI filter against dual two-level inverter under PWM schemes. Presented at: IEEE International Conference on Power Electronics, Smart Grid, and Renewable Energy (PESGRE) 2022, Trivandrum, India, 02-05 January 20222022 IEEE International Conference on Power Electronics, Smart Grid, and Renewable Energy (PESGRE). IEEE, (10.1109/pesgre52268.2022.9715750)
- Kumar, M. and Jayaraman, K. 2020. Design of Active Common Mode Noise Voltage Canceler for SiC Inverter Fed Induction Motor Drive with Reduced Common Mode Voltage PWM. Presented at: 2020 IEEE 29th International Symposium on Industrial Electronics (ISIE), Delft, Netherlands, 17-19 June 2020. IEEE, (10.1109/isie45063.2020.9152492)
- Kumar, M. and Jayaraman, K. 2020. Common mode impedance shaping choke to attenuate the conducted EMI in three phase drive. Presented at: 2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES), Jaipur, India, 16-19 December 20202020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES). IEEE, (10.1109/PEDES49360.2020.9379346)
Ymchwil
Mae ei feysydd o ddiddordeb yn cynnwys dadansoddi, mesur a lliniaru modd cyffredin, modd gwahaniaethol, ac ymyrraeth electromagnetig modd gwahaniaethol annhenid (EMI) yn yriannau modur AC Si a SiC sy'n cael eu bwydo gan wrthdröydd. Mae ei ddiddordebau hefyd yn cynnwys dylunio hidlwyr EMI gweithredol a goddefol i liniaru'r materion EMI mewn trawsnewidyddion pŵer sy'n seiliedig ar SiC. Mae hefyd wedi gweithio ar ddylunio ffurfweddau hidlydd EMI un cam ac aml-gam newydd ar gyfer y topoleg gwrthdröydd dwy lefel a deuol ar gyfer cymwysiadau gyriant modur AC. Mae wedi gweithio'n helaeth ar ddylunio hidlwyr EMI i gydymffurfio â safonau EMI awyrofod fel DO-160. Ar hyn o bryd, mae'n gweithio ar ddylunio cylchedau gyrrwr giât gweithredol ar gyfer cymwysiadau electroneg pŵer.
Bywgraffiad
Manish Kumar received the B.Tech. degree in electrical and electronics engineering from Jawaharlal Nehru Technological University, Hyderabad, India, in 2013 and the M.E degree in Electrical Engineering from Birla Institute of Technology, Mesra, Ranchi, India, in 2016. He received his Ph.D. in Electrical Engineering from the Indian Institute of Technology Ropar, Punjab, India, in 2022.
Since October 2022, he has been working as an Active Gate Driver Research and Development Engineer (KTP Associate) in collaboration with Cardiff University and Toshiba Research Europe Ltd., Bristol, UK. Currently, he is based in the Bristol Research and Innovation lab, Toshiba Research Europe Ltd., Bristol, UK.
His fields of interest include the design of active & passive EMI filters to mitigate the EMI issues in SiC-based power converters. He has also worked on the EMI filter design for the two-level and dual two-level inverter topology for AC motor drive applications. Currently, he is working on the design of active gate driver circuits for power electronics applications.
Meysydd goruchwyliaeth
I am interested in collaborating with the researchers working in my research domain.
Contact Details
Themâu ymchwil
Arbenigeddau
- Electroneg pŵer
- Peirianneg drydanol ac electronig